4-bit full-adder circuit Below is the schematic of the 4-bit full-adder/subtractor you will implement in Lab 6. It has two inputs, A and B, which are both 4-bit numbers. The sum of these two numbers will also be 4-bit, plus a carry-out bit if overflow occurs. Selector S a3 b3 a2 b2 a1 b1 a0 b0 S Unsigned Overflow y3 y2 y1 y0 Cout C3 C2 C1 C0 FA FA FA FA Signed Overflow f3 f2 f1 f0
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