Electronics Weekly

Nvidia says agentic AI is reshaping chip system design

Physics NeMo is now a set of agent-friendly libraries and included in the Nvidia Agent Toolkit. It provides AI physics skills ...

NVIDIA Expands NVIDIA Agent Toolkit With NVIDIA PhysicsNeMo and CUDA-X Libraries to Transform How the World Engineers, Designs and Builds

NVIDIA expands NVIDIA Agent Toolkit with re-architected NVIDIA PhysicsNeMo libraries and updated NVIDIA CUDA-X libraries, enabling software developers to build autonomous AI engineers with ...
SiliconANGLE

Architect Labs nabs $24M to speed up chip design projects with AI

Chip design startup Architect Labs Inc. launched today with $24 million in funding from a group of prominent investors. Kindred Ventures led the seed round. It was joined by Perplexity AI Inc. Chief ...
GitHub

REvolution: An Evolutionary Framework for RTL Generation driven by Large Language Models

* These authors contributed equally to this work. This research was supported by the nanomaterials development program through the National Research Foundation of Korea (NRF) (2022M3H4A1A04096496) ...
EDN

Chiplet design basics for engineers

The world is experiencing an insatiable and rapidly growing demand for artificial intelligence (AI) and high-performance computing (HPC) applications. Breakthroughs in machine learning, data analytics ...
Electronic Design

What’s the Difference Between the Palladium Emulator and an FPGA for PCIe Debug?

PCI-SIG’s Peripheral Component Interconnect Express Gen5 (PCIe Gen5) is a system protocol used primarily for data transfers at high rates in systems. A transfer rate of 32 Gb/s can be achieved by PCIe ...
Design-Reuse

Proven solutions for converting a chip specification into RTL and UVM

Chip design involves translating detailed specifications into RTL code and creating thorough verification environments. This process can be time-consuming and error-prone if done manually. Ensuring ...