OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
8-bit custom MCU built in Logisim Evolution that executes cyclic array rotation using a handcrafted ISA, register file, ALU, control unit, and data memory — fully functional single-cycle processor. A ...
NVIDIA HORIZON: A Hands-Free Agent that Evolves Git Worktrees and Hits 100% RTL Benchmark Completion
NVIDIA Research introduced HORIZON, a hands-free agent framework for hardware design. It treats hardware design as repository-level code evolution. This research team exercises the register-transfer ...
Abstract: The automatic generation of Verilog code using Large Language Models (LLMs) presents a compelling solution to enhance the efficiency of hardware design flow. However, the state-of-the-art ...
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