IEEE

A Logic Circuit-Based Intrusion Detection System Using a Dendritic Neural Model Ensemble

Abstract: An intrusion detection system (IDS) plays a crucial role in network security by distinguishing hostile activities from network traffic. Conventional hardware-based IDS architectures have ...
IEEE

A Boolean System for Breast Cancer Detection Using MicroRNA-Based Logic Gates

Abstract: MicroRNAs (miRNAs) have become valuable biomarkers for early cancer detection. Studies highlight their high sensitivity and specificity in identifying early cancer-related changes.
EDN

Gate drivers tackle 220-V GaN designs

Two half-bridge GaN gate drivers from ST integrate a bootstrap diode and linear regulators to generate high- and low-side 6-V ...
IEEE

Dual-Gate Operation and Configurable Logic From Solution Pattern-Based Zinc Tin Oxide Thin-Film Transistors

Abstract: The development of semiconductor technology is stimulating a significant amount of research into the synthesis of semiconductors and the structural aspects of devices. The liquid ...
IEEE

A Dual Attention KPConv Network Combined With Attention Gates for Semantic Segmentation of ALS Point Clouds

Abstract: Kernel point convolution (KPConv) defines convolutional weights based on Euclidean distances between kernel points and input points and has shown good segmentation results on several ...
IEEE

Digital Logic Based on Superconducting Gate-Controlled Transistors

Abstract: A novel superconducting device based on voltage-controlled critical current suppression has been demonstrated, with the capability of being employed as a superconducting three-terminal ...
IEEE

GNRFET and RRAM Based Digital Gates in Ternary Logic

Abstract: The designs of ternary logic circuits are proposed in this work. The ternary logics are considered as best technology than binary as it provides high-speed, low occupying area and low wire ...
IEEE

MEMS Thermal Actuator for Thermal Logic Gates Based on UV-LIGA Process

Abstract: This paper presents a novel nickel-based thermal actuator fabricated using MEMS UV-LIGA technology, optimized through finite element simulation to construct thermally responsive AND/OR logic ...
IEEE

A True Random Number Generator Based on Race Hazard and Jitter of Braided and Cross-Coupled Logic Gates Using FPGA

Abstract: In the contemporary digital landscape, security has become a vital element of our existence. The growing volume of sensitive information being stored and transmitted over networks ...
IEEE

Design and Performance Analysis of CMOS, GDI, and PTL Logic Gates at 90nm Technology

Abstract: This paper presents a comparative design and simulation analysis of fundamental logic gates using CMOS, GDI, and PTL technologies at the 90 nm technology node. Six basic gates—AND, OR, NOT, ...
IEEE

Comparative Analysis of Reversible Logic Gates and Reversible Decimal to Binary Encoders using Verilog

Abstract: Reversible computing in CMOS design and Quantum computing helps to optimize the power consumption in circuits. This paper presents the comparative analysis of four reversible Decimal to ...
IEEE

Total Ionizing Dose (TID) Analysis of FinFET-Based CMOS NAND and NOR Logic Gates

Abstract: The total ionizing dose analysis of CMOS-based NAND and NOR logic gate is presented. In the normal operating conditions, universal logic gates function as expected. However, exposure to ...