IEEE

A Tutorial on Design of Datapath and Controller of an ALU using Verilog and Verification using Open Source EDA Tools

Abstract: In this paper, the method of designing datapath and controller of an ALU using verilog hardware description language is illustrated with help of an example. Initially, the architecture of ...
GitHub

PicoRV32 - A Size-Optimized RISC-V CPU

PicoRV32 is a CPU core that implements the RISC-V RV32IMC Instruction Set. It can be configured as RV32E, RV32I, RV32IC, RV32IM, or RV32IMC core, and optionally contains a built-in interrupt ...
EDN

Resets in FPGA & ASIC control and data paths

Reset is an important mechanism to bring a digital system into a known state. The need for reset is governed by the system design and application, and various data and control paths are designed to ...
Embedded

Designing with ARM Cortex-M based System-On-Chips (SoCs) – Part I: The basics

These GUIs also provide a schematic approach to circuit design. The circuit can be designed by dragging and dropping components from a component list onto the schematic. After this, they can be ...
IEEE

Digit-pipelined direct digital frequency synthesis based on differential CORDIC

Abstract: A novel direct digital frequency synthesis (DDFS) architecture based on the differential CORDIC (DCORDIC) algorithm is presented. The architecture allows digit-level pipelining in the CORDIC ...