Hackaday

Visualizing Verilog Simulation

You don’t usually think of simulating Verilog code — usually for an FPGA — as a visual process. You write a test script colloquially known as a test bench and run your simulation. You might get some ...
Hackaday

Learning Verilog For FPGAs: The Tools And Building An Adder

Over the last year we’ve had several posts about the Lattice Semiconductor iCEstick which is shown below. The board looks like an overgrown USB stick with no case, but it is really an FPGA development ...
Electronic Design

Go From Datasheet To Schematic Symbol

Perception Software’s SymXpert, now available from EMA Design Automation, automates the schematic symbol-creation process by eliminating manual data entry and simplifying pin-data verification. With ...
EDN

Implementing an FPGA / PCB co-design process

Intelligent design of the FPGA interface is an imperative when using FPGA devices to meet leading-edge system interface requirements such as DDR3. An FPGA interface design without PCB process ...