IEEE

A Configurable 2D-Integer DCT Hardware Accelerator Compatible with H.266 Standard based on RISC-V Architecture

Abstract: This paper presents a system architecture for video compression, including a configurable 2D Discrete Cosine Transform (DCT) hardware accelerator, a CPU, and Direct Memory Access (DMA), ...
Business Wire

CORSAIR Redefines PC Design and Performance Possibilities with Launch of Highly Anticipated AIR 5400

CORSAIR (Nasdaq: CRSR), a global leader in gaming technology, today announced the launch of the highly anticipated AIR 5400 triple-chamber mid-tower PC ...
Electronic Specifier

Upbeat Technology and SiFive introduce RISC-V MCU with AI acceleration

Upbeat Technology has announced the UP201/UP301 family MCU, a dual-core RISC-V microcontroller designed for ultra-low power ...
Electronic Specifier

MIPS launches RISC-V processor to power next wave of ‘Physical AI’ systems

MIPS has launched a new processor architecture to manage real-time data movement for emerging AI systems outside traditional ...

Counterintuitive launches to replace GPUs with reasoning-native computing architecture

Counterintuitive Corp., an artificial intelligence startup that is building what it calls reasoning-native computing, ...