Altium has expanded support for system-level FPGA and CPLD development by adding a JTAG interface to its Nexar system. The addition of the JTAG port enables engineers to use their FPGA-development ...

[Kodera2t] wanted to experiment with programmable logic. Instead of going with an FPGA board, he decided to build his own CPLD (complex programmable logic device) board, with a built-in programmer.

Over on the University of Reddit there’s a course for learning all about FPGAs and CPLDs. It’s just an introduction to digital logic, but with a teacher capable of building a CPLD motor control board ...

In its third major and field-programmable gate array (FPGA) announcement in the last 12 months, Lattice Semiconductor Corp. has introduced MachXO, a new product family that combines the key features ...

In recent years the line between CPLDs and FPGAs has been blurring, with the two distinct product types sharing more and more technical features. Altera’s second generation of its MAX family of CPLDs ...

These programmable-logic devices combine CPLD flash configurability with an FPGA lookup-table architecture for lower-cost, logic-intensive designs. Applications traditionally supported by high-density ...

Lattice has released a family of low-end FPGAs aimed at CPLD-like applications in professional systems and consumer electronics. “This is an FPGA with embedded flash, so you have the instant-on ...

HILLSBORO, OR - August 30, 2005 - Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced that RAD Data Communications has selected the LatticeECâ„¢ FPGA as well as the ispMACHâ„¢ 4000 CPLD ...

Targeting infotainment, networking, and driver-assistance applications. Altera said it will begin shipping automotive-grade devices for selected members of its CPLD, FPGA and structured ASIC device ...

Lattice today announced the immediate availability of the Control Development Kit for its MachXO2™ family of ultra-low density FPGAs‚ enabling low cost prototyping of complex system control and video ...