Design-Reuse

New AMBA 5 ACE/AXI Specification and Its Support in Cadence ACE/AXI VIP

As discussed in the previous installments of the blog, the recent update of the AMBA® 5 ACE/AXI specification introduced several performance improvement features which align the AMBA5 ACE/AXI protocol ...
EDN

Self-timed interconnect solution supports AXI bus protocol

SAN FRANCISCO — EDA and intellectual property (IP) startup Silistix Ltd. has added support for the on-chip AMBA AXI bus protocol to the company's synthesized self-timed interconnect technology, ...
Design-Reuse

Silistix Self-Timed Interconnect Solution Adds Support for AXI Bus Protocol

Extends Designer Use of Popular AMBA Buses for Asynchronous Interconnect on SoCs SAN JOSE, CA -- July 17, 2006 -- Silistix, a provider of innovative software for on-chip communications solutions, ...