EDN

Altera’s Structured ASIC design flow now ITAR-compliant for military apps

Altera Corporation has announced that the U.S. Department of State has certified that the company's HardCopy II structured ASIC design and manufacturing flow is compliant with International Trade in ...
EDN

Monterey adds Synplicity synthesis to ASIC design flow

SAN MATEO, Calif. — Claiming to have a full RTL-to-GDSII design flow at last, Monterey Design Systems has added logic synthesis to its Dolphin placement and routing system. The Dolphin-RTL synthesis ...
Design-Reuse

Domino Logic in ASIC Design Flow - Detailed Methodology and Breakthroughs in High Speed Design Automation Approach

Geneva -- September 22,2008 - Engineers at STMicroelectronic have revealed how to use domino logic, a very fast circuit design style utilized in the highest performance custom designs,in an automated ...
Semiconductor Engineering

In-Design Rail Analysis Is A Beautiful Thing

As a long time designer, ASIC flows amaze me and making them better is my goal. Although a very complex and intricate process, each part of the ASIC flow abstracts the complexity underneath it to ...
Electronic Design

Mixed-signal ASIC Design Meets Tight Deadline

Emerson, AMIS complete mixed-signal project in less than 50 weeks, half the time generally needed to complete such a project Orders were up for Emerson Process Management’s largest-selling product ...
Electronic Design

Carefully Weigh The Tradeoffs Of Cell-Based Vs. Structured ASICs

When all is said and done, the structured ASIC’s shorter development cycle may well be the deciding factor for your design team. With the emergence of 90-nm process technology, ASIC designers get to ...
Design-Reuse

Altera's Structured ASIC Design Flow Now ITAR-Compliant for Military Applications

SAN JOSE, Calif. -- March 12 2007--Altera Corporation (Nasdaq: ALTR) today announced that the U.S. Department of State has certified that the company's HardCopy(R) II structured ASIC design and ...